1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor wafer made of, for example, silicon, GaAs, GaP or InP.
2. Description of the Related Art
Semiconductor wafers have been produced by a process of slicing a monocrystalline ingot of silicon or the like to obtain wafers, chamfering the peripheral edge of each sliced wafer, then lapping, acid-etching, and mirror-polishing the same.
In this process, chamfering the peripheral edge of the sliced wafer is an essential step. A monocrystal of silicon or the like is very hard and brittle, and unless the peripheral edge of each sliced wafer is subjected to the chamfering process, the sliced wafer may be cracked or chipped during the process of manufacturing semiconductor wafers and devices, resulting in a decrease in the yield and degradation in the characteristics of the semiconductor devices.
Methods for chamfering are generally classified into a chemical method in which the peripheral edge of each wafer is chemically rounded and a mechanical method in which the peripheral edge of each wafer is mechanically chamfered through use of a grindstone. With the trend that the diameters of wafers have increased, the latter-mentioned mechanical method has been widely used because it can produce wafers having consistent quality and high dimensional accuracy.
In order to chamfer the peripheral edge of a wafer by the mechanical method, the wafer must be held firmly. Since the chamfering is applied to the peripheral edge of the wafer, the wafer is held at its main surface. Therefore, when the wafer is held, the main surface of the wafer is likely to become scratched and/or stained. However, since a pattern of a device is formed on the main surface of the wafer, the main surface of the wafer must be prevented from becoming scratched and stained. Because of this, wafers are generally processed in the following manner: First, the chamfering process is performed immediately after each wafer is sliced from a monocrystalline ingot; after the completion of the chamfering process, the wafer is subjected to the lapping process, in which the main surface of the wafer is ground and the thickness of the wafer is made uniform. Through this lapping process, scratches and stain generated on the main surface of the wafer during the chamfering process are removed.
With a recent increase in the degree of integration of semiconductor devices, it has been demanded that the chamfered surface of each wafer be improved in terms of smoothness and dimensional accuracy. Conventionally, the smoothness of the chamfered surface of a wafer is improved through employment of a grindstone including smaller diameter abrasive grains, while the productivity is sacrificed, and the dimensional accuracy of the chamfered surface of the wafer is improved through improvements on the accuracy of a chamfering machine and control technology therefor.
However, if the lapping process is performed subsequent to the chamfering process, the above-described quality improvements on the smoothness and dimensional accuracy of the chamfered surface diminish. That is, as illustrated in FIG. 1A and FIG. 1B, the lapping process is performed in a manner such that a chamfered wafer 1 is placed between an upper lapping turn table 2 and a lower lapping turn table 3, and a mixture (abrasive agent) comprising lapping fluid and abrasive grains is applied between the wafer 1 and the upper lapping turn table 2 and between the wafer 1 and the lower lapping turn table 3, then the main surfaces of the wafer 1 are rubbed between the upper lapping turn table 2 and the lower lapping turn table 3 while pressure is applied thereon. In this process, a holding member 4 is utilized to hold the wafer 1. The abrasive grains enter the space between the holding member 4 and the wafer 1, so that the peripheral edge portion 5 of the wafer 1 is also ground and the shape of the peripheral edge portion 5 of the wafer 1 is degraded. Further, the abrasive grains utilized for the lapping process are more coarse than those used for chamfering, so the chamfered surface of the wafer 1 becomes rougher, and as a result, the smoothness and dimensional accuracy of the chamfered surface of the wafer 1 cannot be maintained at the high level achieved during the chamfering process.
Therefore, there exists a demand for a method of manufacturing a semiconductor wafer which can maintain the smoothness and dimensional accuracy of a chamfered surface of a wafer achieved during the chamfering process.